OLEA® T222 - Target Framework (5)
To understand, improve or debug a FLU model on Hardware, the user requires access to the internal signals at every FLU-iteration (i.e. at the Data rate). Any signal within the main FLU model can be requested to be logged.
In order to trace a signal (wire), the following conditions should be respected:
– The signal must be directly connected to the output port of a standard subsystem (not a library block).
– The user shall activate the signal logging: right click on a wire, select “Properties”, tab “Logging and accessibility” and then tick “Log signal data”.
The framework will list logged signals and create a structure containing them.
At every main FLU model iteration, the signal values will be copied at their relevant addresses within the DPRAM.
During algorithm development, parameters need to be tuned and changed on the fly. To define a parameter as tunable, the user should:
– Make the parameter a data object of type Simulink.Parameter.
– Set the parameter storage class to ExportedGlobal.
Any variable (Simulink.Parameter with its CoderInfo.StorageClass set to ExportedGlobal) will be a candidate for calibration. The framework will list all those variables and create a structure in the DPRAM to store those values.
The Timing generation is meant to compute the delay to apply, within a data rate model, to each block requiring an external resource.
The resources can be DPRAM access, using the ram_controller or peripheral access, using the Sequencer.
This delay is counted in Flu clock cycles and is relative to the start of the algorithm, triggered by the StartPulse signal.
Those delays have no impact on the simulation as they use pipelines (clock rate delays, invisible during data rate simulation).
When you perform a Generate Interface command from the Silicon Mobility menu, all sources are cleaned up. You can also do it manually by following these steps :
- Close Matlab
- Delete all files in Model/SiliconMobility folder except Triggers folder
- Reopen the project